IBM Research team has made a new type of transistor 5nm chips, the smallest for a silicon processor. This new method, that has been made with research partners GLOBALFOUNDRIES and Samsung, alters some basic things about the assembly of chips to help break a barrier that showed the end of Moore’s Law in the previous processors.
IBM 5nm Transistor Issue Resolved
IBM announced that Moore’s Law did not end, the 5nm chip can be achieved in the nail cover size of 30 billion transistors. In contrast, with the current 10nm Xiao Long 835, the number of integrated transistors is about 3 billion. IBM emphasizes that the increase in the number of transistors in the same package area has a lot of benefits, such as reducing costs and improving performance, and it is very important for the battery life of existing devices such as that of mobile phones, which will increase by 2 to 3 times. According to earlier information, many people in the industry have said that 5nm may be the physical limit. But IBM does not think so. It describes how the 10 nm thickness of the SiBCN and SiOCN spacers over the SiN, and the 6-nanometer thickness of the 7-nanometer process test chip using a 6-nm thick insulating medium on the (22-nanometer process chip). IBM intends to introduce SiBCN insulators at 14-nanometer process nodes (already manufactured at GlobalFoundries), while SiOCN will be used at 7nm nodes; Stathis said IBM expects to use the ultimate insulator – air gap at 5-nanometer nodes.
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